Mirabilis Design provides Electronics System-Level Modeling IP and simulation platform. VisualSim IP enables rapid prototyping for performance, power and functional analysis for architecture exploration of SoC and systems. VisualSim has over 500 IPs including processor, memory, cache, buses, I/O, DMA, accelerators and support blocks. Analysis include sizing, partitioning and energy management.
Product Description: DSP,Memory,Networking,Telecoms,Wireless,HW/SW Co-Verification,ESL Co-Verification,ESL Design and Entry,ESL Power Analysis,ESL Simulation,ESL Test and Verification,Libraries,Peripherals,RTOS,Software Tools,CPU/GPU,Memory,Networking,On Chip Fabric,Storage