Steep-slope transistors are emerging technologies that can further down-scale the power supply voltage and energy, and negative capacitance FET (NCFET)—a new type of transistor based on ferroelectric gate-oxides—has been shown to be one of the most promising steep-slope transistors through industry practices and system design. This session will give an overview of this technology with an emphasis on cross-layer interactions between device, circuit-system and application-level aspects.

The session will start with Sayeef Salahuddin (Berkeley) who will introduce the concept of NCFETs. What makes NCFETs particularly amenable to industry adoption is the CMOS-compatibility of “break-through” ferroelectrics. Zoran Krivokapic (GLOBALFOUNDRIES) will talk about how these oxides can enable NCFETs at advanced nodes and what the integration challenges are in light of their recent demonstration of high performance, state-of-the-art 14 nm node, negative capacitance FinFETs. Suman Datta (Notre Dame) will discuss circuit- and system-level aspects of NCFETs and related technologies.