The complexity of chips has rapidly increased in line with the predictions of Moore’s law. Recent years have seen an explosion in the cost and time require to design advanced System-on-Chips (SoCs), systems-in-packages (SiPs), and PCBs. DARPA is addressing these challenges through two new electronic design automation (EDA) research programs: the Intelligent Design of Electronic Assets (IDEA) program and the Posh Open Source Hardware (POSH) program. These programs seek to form the foundation of an intelligent hardware compiler. The aim of these research efforts is to create a universal hardware compiler capable of automatically generating production ready GDSII drawings directly from source code and schematics – essentially developing the equivalent of a software compiler. Achieving this ambitious goal will require advancing the state of the art in machine learning, optimization algorithms, and expert systems. This session will discuss technical challenges associated with building a universal hardware compiler and provide analysis of the potential impact it could have on the current semiconductor ecosystem.