DAC 2018 - Speakers/Authors

Debdeep Mukhopadhyay

Agenda
- 120.31 - Cryptographically Secure Multi-Tenant Provisioning of FPGAs

Saibal Mukhopadhyay

Georgia Institute of Technology

Agenda
- 121.32 - Edge-Host Partitioning of Deep Neural Networks With Feature Space Encoding for Resource-Constrained Internet-of-Things Platforms
- 71.4 - Edge-Cloud Collaborative Processing for Intelligent Internet of Things: A Case Study on Smart Surveillance

Prashansa Mukim

Agenda
- 120.15 - Use 3D Integration to Hinder Reverse Engineering Both During and After Manufacturing

Niamh Mulholland

Agenda
- 19.1 - Ares: A Framework for Quantifying the Resilience of Deep Neural Networks

Philipp Mundhenk

Agenda
- 55.5 - Dynamic Vehicle Software with AUTOCONT

Peter Munk

Agenda
- 22.1 - Semi-automatic Safety Analysis and Optimization

Taizo Murakami

Agenda
- 125.22 - ISO26262 Compliant Soft-error Tolerant Design Methodology

Boris Murmann

Agenda
- 45.1 - TRIG: Hardware Accelerator for Inference-Based Applications and Experimental Demonstration Using Carbon Nanotube FETs

Sanjeev Murthy

Agenda
- 75.1 - SMApproxLib: Library of FPGA-Based Approximate Multipliers

Onur Mutlu

Agenda
- 77.4 - VRL-DRAM: Improving DRAM Performance via Variable Refresh Latency

Ann Steffora Mutschler

Semiconductor Engineering

Agenda
- Session 2: Verification Metrics from Cores to Systems: Are Conventional Metrics Running out of Steam?

Shahzad Muzaffar

Agenda
- 34.5 - A Special-purpose Instruction Set and Microarchitecture for Low-power, Dynamic IoT Communication

Mischa Möstl

TU Braunschweig

Agenda
- 55.3 - Cross-Layer Dependency Analysis with Timing Dependence Graphs

Uwe Müller

CAD Specialist at Infineon Technologies

Agenda
- 124.23 - Well Dependent Gate Antenna Rules

Taesik Na

Agenda
- 121.32 - Edge-Host Partitioning of Deep Neural Networks With Feature Space Encoding for Resource-Constrained Internet-of-Things Platforms

Benoit Nadeau-Dostie

Anshuman Nadkarni

Agenda
- Session 2: Verification Metrics from Cores to Systems: Are Conventional Metrics Running out of Steam?

Azad Naeemi

Agenda
- 21.4 - Accurate Processor-Level Wirelength Distribution Model for Technology Pathfinding Using a Modernized Interpretation of Rent’s Rule

Raghu Nagaraj

San Diego CA UNITED STATES

Agenda
- 34.3 - Differential Energy Analysis For Improved Performance/Watt In Mobile GPU

Makoto Nagata

Professor at Kobe University

Agenda
- 1.5 - Extended CPS Simulation for EMC Compliance of Automotive IC Chip Developments