DAC 2018 - Speakers/Authors

Komal Arora

Agenda
- 123.19 - Increased Productivity Solution for Full Custom Layout

John Arthur

IBM Research - Almaden

Agenda
- Session 5: Industrial-strength Accelerators for Machine Learning and Artificial Intelligence

Navid Asadi

Agenda
- 66.2 - Fully Automated Plasma FIB IC Deprocessing and Reverse Engineering

Krste Asanovic

Agenda
- Session 59: Computing Minus Moore’s Law = ?!?!
- 72.3 - Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications

Mohammed Ashraf

Agenda
- 70.2 - Raise Your Game for Split Manufacturing: Restoring the True Functionality Through BEOL

N. Asokan

Agenda
- 23.1 - Revisiting Context-Based Authentication in IoT

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David Atienza

Associate Professor of EE and Director of Embedded Systems Laboratory at EPFL

Lausanne SWITZERLAND

Agenda
- Young Under 40 Innovators Award Panel

Derek Atkins

Agenda
- 123.24 - Low-resource Cryptography for Highly Constrained IoT Devices

Albert Au

Todd Austin

University of Michigan

Agenda
- 23.4 - Reducing the Overhead of Authenticated Memory Encryption Using Delta Encoding and ECC Memory
- Session 59: Computing Minus Moore’s Law = ?!?!

Shaan Awasthi

Agenda
- 123.6 - System in Package Power Integrity Analysis of Large Scale FPGA

Abdelouahab Ayari

Agenda
- 123.13 - ISO 26262: How Safe is your Safety Mechanism?

Raid Ayoub

Agenda
- 79.4 - STAFF: Online Learning with Stabilized Adaptive Forgetting Factor and Feature Selection Algorithm

Vahid Babaei Ajabshir

Agenda
- 81.15 - Fault-Tolerant Topology Generation for 3D-NoCs

Manoj Babu

Graduate Student at Arizona State University

Agenda
- 79.4 - STAFF: Online Learning with Stabilized Adaptive Forgetting Factor and Feature Selection Algorithm

Jonathan Bachrach

Agenda
- 37.2 - ACED: A Hardware Library for Generating DSP Systems

Simone Bacles-Min

Mr Sampath Baddam

Global-e

Agenda
- 124.28 - Rapidly Building Next Generation Web-based EDA Applications and Platforms from Legacy Tools

Sehyun Baek

Agenda
- 81.12 - VM-CFI : Control-Flow Integrity for Virtual Machine Kernel using Intel PT

SeungHeon Baek

Agenda
- 125.15 - Analog/Mixed-Signal Verification of DRAM Peripherals with Automatically-Generated SystemVerilog Models