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Last Name First Name Company State Country Updated

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Jaume Abella

  • Agenda
    • 120.22 - Hardware Support for Enforcing Performance Guarantees in Multicore Processors
    • 55.1 - Modelling Multicore Contention on the AURIX(TM) TC27x
    • 55.2 - Cache Side-Channel Attacks and Time-Predictability in High-Performance Critical Real-Time Systems
    • 65.1 - Measurement-Based Cache Representativeness on Multipath Programs
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Francisco Cazorla

  • Agenda
    • 120.22 - Hardware Support for Enforcing Performance Guarantees in Multicore Processors
    • 55.1 - Modelling Multicore Contention on the AURIX(TM) TC27x
    • 55.2 - Cache Side-Channel Attacks and Time-Predictability in High-Performance Critical Real-Time Systems
    • 65.1 - Measurement-Based Cache Representativeness on Multipath Programs
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Enrique Diaz

  • Agenda
    • 55.1 - Modelling Multicore Contention on the AURIX(TM) TC27x
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Leonidas Kosmidis

Senior Researcher at Barcelona Supercomputing Center

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Enrico Mezzetti

  • Agenda
    • 55.1 - Modelling Multicore Contention on the AURIX(TM) TC27x
    • 65.1 - Measurement-Based Cache Representativeness on Multipath Programs
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