DAC 2018 - Speakers/Authors

Vincent Abikhattar

Agenda
- 42.4 - Fight Fire with Formal Verification

Homayoon Akhiani

NVIDIA Corporation

Agenda
- Session 42: Novel Applications of Formal Verification

Puneet Anand

Staff Engineer at Qualcomm

San Diego California UNITED STATES

Agenda
- 42.5 - Formal Signoff Meets Real-world Tapeout Schedules

Laurent Arditi

Agenda
- 42.4 - Fight Fire with Formal Verification

Xiushan Feng

Agenda
- 42.6 - Convergence Techniques for C vs. RTL Equivalence Checking

Jing Gao

Agenda
- 42.5 - Formal Signoff Meets Real-world Tapeout Schedules

Shintaro Imamura

Agenda
- 42.2 - Acceleration Method of Sequential Equivalence Check in High-Level Synthesis Design Flow

Yong Liu

Agenda
- 42.6 - Convergence Techniques for C vs. RTL Equivalence Checking

Rachna Nambiar Jain

Agenda
- 42.6 - Convergence Techniques for C vs. RTL Equivalence Checking

Olivier Ponsini

Agenda
- 42.4 - Fight Fire with Formal Verification

Venkatraman Ramakrishnan

Texas Instruments

Agenda

Sudhakar Surendran

Texas Instruments India Pvt. Ltd.

Tadaaki Tanimoto

Agenda
- 42.2 - Acceleration Method of Sequential Equivalence Check in High-Level Synthesis Design Flow

Li You

Agenda
- 42.6 - Convergence Techniques for C vs. RTL Equivalence Checking

Wayne Yun

Agenda
- 42.3 - Formally Checking Legality of Firmware Instructions and their Combinations