The promise of 5G is significant, but it exerts new and stringent requirements onto cellular infrastructure. Higher bandwidth and many more devices will drive throughput requirements, new usage models will require a portfolio of solutions and emerging specifications require flexibility. In this article, we discuss how the unique requirements of 5G can be successfully addressed by a SoC architecture comprising of a high performance CPU subsystem and hardware processing elements, including re-programmable acceleration in the form of an embedded . Specifically, we focus on the requirements of the Radio Digital Front-End and Baseband, comprising Layer-1 (Physical layer) and Layer 2/3.