← Session 3: Hardware IP for Deep Learning
event-icon

IP Track Invited

3.1 - Understanding the Limitations of Existing Energy-efficient Design Approaches for Deep Neural Networks

10:30 AM–12:00 PM Jun 25, 2018

Room 2008

Who's Attending (7)
user-icon
Speaker (1)
user-icon
Description
This talk addresses joint hardware and algorithm optimization for energy-efficient DNN processing.
Tags
Event TypeIP Track Invited
,
KeywordsArchitecture & System Design
,
KeywordsEmerging Architectures & Technologies
,
Topic AreaIP
,
Topic AreaMachine Learning/AI