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Session 3: Hardware IP for Deep Learning
IP Track Invited
3.1 - Understanding the Limitations of Existing Energy-efficient Design Approaches for Deep Neural Networks
10:30 AM–12:00 PM Jun 25, 2018
(America - Los Angeles)
Room 2008
Who's Attending
(7)
Jiho Kim
Speaker
(1)
Vivienne Sze
Description
This talk addresses joint hardware and algorithm optimization for energy-efficient DNN processing.
Tags
Event Type
IP Track Invited
,
Keywords
Architecture & System Design
,
Keywords
Emerging Architectures & Technologies
,
Topic Area
IP
,
Topic Area
Machine Learning/AI